The present invention relates to a method of transmitting binary logic signals between electronic circuits, and an interface circuit implementing this method.
Despite the rapid progress of semiconductor technology, the number of transistors in an integrated circuit (hereinafter, IC) remains finite, and different system functions are often best implemented in different ICs. An electronic system such as a computer therefore usually comprises a plurality of ICs interconnected on a printed-circuit board. The input-output circuits of these ICs send and receive signals at various standardized voltage levels, such as the transistor-transistor-logic (TTL) level and low-voltage TTL (LVTTL) level employed for bipolar ICs, and the complementary metal-oxide-semiconductor (hereinafter, CMOS) level and low-voltage CMOS (LVCMOS) level employed for CMOS ICs. TTL and LVTTL interface circuits (drivers) produce output voltage swings of approximately two volts. CMOS and LVCMOS drivers produce output voltage swings equal to the power-supply voltage, typically five volts (5 V) or 3.3 V.
With the increasing signal speeds of electronic systems, however, transmission-line effects such as signal reflection and ringing, and noise effects such as crosstalk and ground bounce, create severe problems in the design of interconnections on printed-circuit boards. One solution to these problems is impedance-matching termination of the signal transmission lines, which reduces reflection and ringing. Another solution is to reduce the voltage swing of the signals, which reduces crosstalk and ground bounce.
These solutions have been adopted in recent interface standards such as the Center-Tap-Terminated (CTT) Low-Level, High-Speed Interface Standard for Digital Integrated Circuits published in November 1993 by the Electronic Industries Association, referred to below as the CTT standard. For a signal line with fifty-ohm termination, the CTT standard specifies a typical termination voltage and reference voltage of 1.5 V, with a high output logic level of from 1.9 V to 2.1 V and a low output logic level of from 0.9 V to 1.1 V. The output voltage swing is accordingly in the range from 0.8 V to 1.2 V. These output levels and termination conditions enable a binary logic signal with a bit rate exceeding one hundred million bits per second, or a clock signal with a frequency exceeding one hundred megahertz (100 MHz), to be transmitted with little distortion and without generating troublesome electrical noise.
In terms of power dissipation, however, CTT and similar interface schemes leave much to be desired. In the CTT interface, since both the high and low output potentials differ from the termination potential, current flows at all times between the driver circuit and the termination voltage source, dissipating direct-current (DC) power in the driver circuit and termination resistor. This DC power accounts for a major share of the total power dissipated by the interface.